[Original Documentation was writtein in 1989, a little
modification was done in 1997 May by T. Ichihara]

Data Acquisition System at the RIKEN Accelerator Facility

T. Ichihara, T. Inamura, T. Wada and M. Ishihara
RIKEN Accelarator Research facility
2-1, Hirosawa, Wako, 351-01, Japan

Data Acquisition system using J11 CPU (Starburst 2180
ACC) and Micro VAX II has been developed. Each event is
processed by J11 CPU. Buffered data is transferred to Micro
VAX II through Kinetic parallel bus. The executable image on
J11 is builded on Micro VAX II using VAX/RSX and down-line

Introduction

The construction of the RIKEN Accelerator Facility
started in 1975. First, the Heavy-ion linac was constructed
in 1981 and it is the world's first variable frequency
heavy-ion linear accelerators with a duty factor 100 %.
The construction  of the RIKEN ring cyclotron (K=540 MeV)
started in 1981 and the first beam was obtained in 1986 with
a injector of linac. The AVF cyclotron, which is another
injector for ring cyclotron, was completed in 1989. Many
experimental programs of nuclear physics, atomic physics,
etc. are now running.

The data acquisition system for RIKEN Accelerator
Facility is aimed at the small to medium size experiment,
especially for nuclear physics experiment. We assumed the
data length is 1-500 words for each event and maximum event
rate is about 10 kcps. The maximum data rate is assumed to
be 100-300 kB/sec. In such a condition, we choose a Micro
VAX II and front end processor. For the front end processor,
we have two candidates, Starburst (J11 CPU) and VME system.
Owing to the limited man-power and experience of PDP-11
system, we choose Starburst as front end processor.

Data Acquisition

The data acquisition system is based on the Startburst
Auxiliary Crate Controller (CES 2180 ACC) on CAMAC and Micro
VAX II computer. These two processors are connected by
Kinetic 3922/2922 Crate controller.  Figure 1 shows the
configuration of the data acquisition system. Each data is
read by J11 CPU event by event and buffered. Buffered data
is transferred to the Micro VAX II computer and then
processed.

For each event, J11 is interrupted by a trigger signal
and then reads data from CAMAC module.  The peak rate of
CAMAC access from the ACC is 2.5 micro sec./16bit (800 kB/s)
kB/s, including the conversion time of the module and
$\mu$ second to process one event (typically 10-100 words)
depending on the data length and characteristics of modules.

Data are doubly buffered and if the current buffer is
filled, J11 changes the buffer immediately and generates a
LAM signal to host computer to start a DMA.  The data
transfer rate in DMA depends on the length of the cable
between Crate controller and Micro VAX II. The transfer rate
is about 1MB/s using a short cable (5m) and about 310 kB/s
using a long cable (90m). Data acquisition of event by event
and DMA transfer can be carried out simultaneously. The
priority of the CAMAC bus access between CC and ACC is
determined by cable connection of the request-grant chain.
Usually ACC has a higher priority.

The combination of J11 CPU (starburst) and Micro VAX II
computer results following significance.

(1) Quick response to the interrupt by trigger; J11 starts the
interrupt service routine immediately to read data. There
is no overhead of the OS.
(2) No overhead of data acquisition to the host processor; Host
processor is interrupted only if the buffer is filled. Most
part of the CPU time on the host processor can be utilized
for on-line data analysis.
(3) It is not necessary to operate a J11 ACC as a stand-alone
system with external disk and operating system; Editting,
Assembling, and Linking to create an executable images on
J11 is carried out on the host computer using VAX/VMS and
VAX/RSX. It is then loaded to J11 ACC via CAMAC Dataway by
a loader program written by Fortran.
(4) Every hardware is commercially available.
(5) Very simple configuration and easy to introduce and
maintain.

Software

In Micro VAX II computer, following processes realize
the data acquisition:
(1) Real time detached process to handle the data flow by DMA
(2) TSS process to analyze data and increment histograms
(3) TSS process to display histogram to graphic device
interactively
(4) TSS process to control the experiment (start,stop,clear
etc.) interactively

They communicate to each other via common event flags and
shared memory.

In order to access a CAMAC module from host computer we
have written two device drivers. One is a standard VMS
device driver for CAMAC crate controller for handing
interrupt and controlling DMA. It is called by QIO system
routines and it runs as a part of the operating system.
Another driver is used for executing a single CAMAC
function. This driver access the device resister directly in
the user space (not in the system space) and execute a
single CAMAC function quickly. It takes about 60 $\mu$
second to execute a single CAMAC function called from a
fortran program on Micro VAX II computer.

Data analysis

Usually on-line data analysis is carried out on the RIKVAX
VMS clusters, consisting of VAX 6100-600, VAX 4000-60,
and several Alpha (DEC3000-400,300) work stations.

References

[1] T. Ichihara et al.: IEEE Transaction on Nuclear Science,
36-5  p. 1628  (1989).